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USAF Selects GE to Define High Performance Embedded Computer Architectures

By Juliet Van Wagenen | September 24, 2015
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GE radar processor for USAF platforms. Photo: GE
GE radar processor for USAF platforms. Photo: GE

[Avionics Today 09-24-2015] GE’s Intelligent Platforms business is currently undertaking a six month research program to help the United States Air Force (USAF) define open architectures for future generations of radar processors onboard Air Force platforms. The program is being carried out at GE’s HPEC Center of Excellence in Billerica, Ma.

The study involves the benchmarking and optimization of Synthetic Aperture Radar (SAR) and Ground Moving Target Indicator (GMTI) radar modes on multiprocessor High Performance Embedded Computing (HPEC) systems comprising conventional Central Processing Units (CPUs) and Graphics Processing Units (GPU) interconnected by high-speed fabric.

Also included in the award is the development of a lab-based processor system that has a clear path to rugged deployment on Air Force platforms. Such a platform will embrace the Open System Architecture (OSA) approach based on open and de facto industry standards and interfaces in both hardware and software.

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