How to Mitigate the Risk in Multi-Core Safety Certification?
Avionics systems are currently undergoing a transition from single core processor architectures to multi-core processors. This transition enables a reduction in size, weight and power (SWaP) and the use of common processing platforms, providing multiple potential benefits for programs in terms of reduced costs, spares management and obsolescence. However, avionics hardware and software certification policies and guidance are evolving as research and experience is gained with multi-core processor architectures.
In this technical white paper you will learn more about:
- What is unique about multi-core processors?
- Collins Aerospace efforts related to multi-core certification.
- Defined requirements for a commercial real-time operating system (RTOS) for multi-core certification.
- The collaborative approach undertaken by Collins Aerospace and Wind River in the development of a multi-core avionics platform and COTS multi-core RTOS.
- The approach to achieve DO-178C DAL A safety certification on an FAA Program of Record.
We also present the approach taken to comply with FAA CAST-32A objectives, including investigation of multi-core interference channels, documentation and analysis of results, as well as methods to support independent 3rd party certification.
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